SystemVerilog is a huge language and is still growing. To boot we have two separate verification methodologies (VMM and OVM). It is heartening to see some unification effort by Accellera. But I believe VMM and OVM will still be around for at least a couple of years.
To ease up coding effort, VMM provides vmmgen utility (which seems broken in the recently announced 1.2 release). OVM on the other hand has a couple of utilities available in the contrib area of the OVM World.
Being an Emacs addict, I always craved to have these capabilities as part of Emacs. Over the past year I made some effort in this direction and I think at this point the code templates have matured enough for a public release. Additionally my package (which is built over YASnippet package for Emacs) supports common SystemVerilog constructs like class, case, always etc.
GNU Emacs (version 22 or later) -- If you are still using XEmacs, I suggest that you have another look at GNU Emacs. The past decade has seen quite a few new developments with GNU Emacs. And a lot of new elisp packages are now supported only for the GNU flavor.
Verilog Mode -- Let me know if there is any other verilog mode for Emacs worth its name, and I will add support for that too.
Download the package from the following link yasnippet-bundle.el.gz
Uncompress the downloaded file in a directory where you keep your other emacs packages. Make sure that the directory you kept the uncompressed file in, is in your Emacs load path.
Load the downloaded package. You can do this by adding the following lines in your emacs init file.
;; Add the directory to Emacs load path (setq load-path (cons "/path/to/directory" load-path)) ;; Load the package (require 'yasnippet-bundle)
Now when you launch Emacs, you should see a YASnippet menu in the top menu-bar. Navigating to verilog-mode on this menu-bar will make all the verilog templates visible to you. When editing a file in verilog-mode, you can also access these templates using keyboard shortcuts shown along with the menu-bar entries. All the VMM specific templates can be accessed by typing vmm and following it up with a TAB. Similarly OVM templates can be accessed by typing ovm and then a TAB. SystemVerilog snippets can be invoked by typing the respective keywords followed by a TAB. To know all the package capabilities, just watch the following video tutorial.
If you face any issues with installation, just leave a message. Bug reports and other feedbacks/suggestions are also welcome. I intend to maintain and further develop this package. Ideas and suggestions are most welcome. Future revisions will be announced on Twitter.